
State Machine - |C2616|memory_manager:mem_manager_e|current_state
Name current_state.write_test_wait current_state.write_test_delay current_state.write_test current_state.read_s_wait current_state.read_s_delay current_state.read_s current_state.write_2_wait current_state.write_2_delay current_state.write_2 current_state.write_1_wait current_state.write_1_delay current_state.write_1 current_state.idle 
current_state.idle 0 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.write_1 0 0 0 0 0 0 0 0 0 0 0 1 1 
current_state.write_1_delay 0 0 0 0 0 0 0 0 0 0 1 0 1 
current_state.write_1_wait 0 0 0 0 0 0 0 0 0 1 0 0 1 
current_state.write_2 0 0 0 0 0 0 0 0 1 0 0 0 1 
current_state.write_2_delay 0 0 0 0 0 0 0 1 0 0 0 0 1 
current_state.write_2_wait 0 0 0 0 0 0 1 0 0 0 0 0 1 
current_state.read_s 0 0 0 0 0 1 0 0 0 0 0 0 1 
current_state.read_s_delay 0 0 0 0 1 0 0 0 0 0 0 0 1 
current_state.read_s_wait 0 0 0 1 0 0 0 0 0 0 0 0 1 
current_state.write_test 0 0 1 0 0 0 0 0 0 0 0 0 1 
current_state.write_test_delay 0 1 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_test_wait 1 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |C2616|memory_manager:mem_manager_e|SDRAM_Controller:sdram_controller_e|current_state
Name current_state.read_push_back current_state.read_end current_state.read_data current_state.read_wait3 current_state.read_wait2 current_state.read_wait1 current_state.read_start current_state.read_nop2 current_state.read_nop1 current_state.read_act current_state.read current_state.write_stop_pre current_state.write_stop1 current_state.write_stop0 current_state.write_N current_state.write_D0 current_state.write_nop2 current_state.write_nop1 current_state.write_act current_state.write current_state.ref_wait current_state.ref_aref current_state.ref_nop2 current_state.ref_nop1 current_state.ref current_state.idle current_state.init_LMR2 current_state.init_LMR1 current_state.init_LMR current_state.init_wait3 current_state.init_wait2 current_state.init_ref2 current_state.init_wait1 current_state.init_ref1 current_state.init_nop2 current_state.init_nop1 current_state.init_pre current_state.init_powerup current_state.init_start 
current_state.init_start 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.init_powerup 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
current_state.init_pre 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
current_state.init_nop1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
current_state.init_nop2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
current_state.init_ref1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
current_state.init_wait1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
current_state.init_ref2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
current_state.init_wait2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
current_state.init_wait3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
current_state.init_LMR 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
current_state.init_LMR1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
current_state.init_LMR2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.idle 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.ref 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.ref_nop1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.ref_nop2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.ref_aref 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.ref_wait 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_act 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_nop1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_nop2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_D0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_N 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_stop0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_stop1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.write_stop_pre 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_act 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_nop1 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_nop2 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_start 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_wait1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_wait2 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_wait3 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_data 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_end 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
current_state.read_push_back 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|current_state
Name current_state.set_DAC_state current_state.post_adjust_state current_state.calc_state_2 current_state.calc_state_1 current_state.div_state current_state.mult_state current_state.accu_state current_state.diff_state current_state.collect_data_state current_state.ready_state current_state.pre_ready_state current_state.reset_wait_state current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.reset_wait_state 0 0 0 0 0 0 0 0 0 0 0 1 1 
current_state.pre_ready_state 0 0 0 0 0 0 0 0 0 0 1 0 1 
current_state.ready_state 0 0 0 0 0 0 0 0 0 1 0 0 1 
current_state.collect_data_state 0 0 0 0 0 0 0 0 1 0 0 0 1 
current_state.diff_state 0 0 0 0 0 0 0 1 0 0 0 0 1 
current_state.accu_state 0 0 0 0 0 0 1 0 0 0 0 0 1 
current_state.mult_state 0 0 0 0 0 1 0 0 0 0 0 0 1 
current_state.div_state 0 0 0 0 1 0 0 0 0 0 0 0 1 
current_state.calc_state_1 0 0 0 1 0 0 0 0 0 0 0 0 1 
current_state.calc_state_2 0 0 1 0 0 0 0 0 0 0 0 0 1 
current_state.post_adjust_state 0 1 0 0 0 0 0 0 0 0 0 0 1 
current_state.set_DAC_state 1 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|ADC:adc_c_h|ll_current_state
Name ll_current_state.ll_clk_fe ll_current_state.ll_wait_2e ll_current_state.ll_wait_2 ll_current_state.ll_clk_re ll_current_state.ll_wait_1e ll_current_state.ll_wait_1 ll_current_state.ll_apply_data ll_current_state.ll_reset 
ll_current_state.ll_reset 0 0 0 0 0 0 0 0 
ll_current_state.ll_apply_data 0 0 0 0 0 0 1 1 
ll_current_state.ll_wait_1 0 0 0 0 0 1 0 1 
ll_current_state.ll_wait_1e 0 0 0 0 1 0 0 1 
ll_current_state.ll_clk_re 0 0 0 1 0 0 0 1 
ll_current_state.ll_wait_2 0 0 1 0 0 0 0 1 
ll_current_state.ll_wait_2e 0 1 0 0 0 0 0 1 
ll_current_state.ll_clk_fe 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|ADC:adc_c_h|hl_current_state
Name hl_current_state.hl_read_adc_d hl_current_state.hl_read_adc hl_current_state.hl_set_config_reg_2 hl_current_state.hl_set_config_reg_1 hl_current_state.ADC_reset_boot hl_current_state.ADC_reset hl_current_state.hl_reset 
hl_current_state.hl_reset 0 0 0 0 0 0 0 
hl_current_state.ADC_reset 0 0 0 0 0 1 1 
hl_current_state.ADC_reset_boot 0 0 0 0 1 0 1 
hl_current_state.hl_set_config_reg_1 0 0 0 1 0 0 1 
hl_current_state.hl_set_config_reg_2 0 0 1 0 0 0 1 
hl_current_state.hl_read_adc 0 1 0 0 0 0 1 
hl_current_state.hl_read_adc_d 1 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|ADC:adc_v_h|ll_current_state
Name ll_current_state.ll_clk_fe ll_current_state.ll_wait_2e ll_current_state.ll_wait_2 ll_current_state.ll_clk_re ll_current_state.ll_wait_1e ll_current_state.ll_wait_1 ll_current_state.ll_apply_data ll_current_state.ll_reset 
ll_current_state.ll_reset 0 0 0 0 0 0 0 0 
ll_current_state.ll_apply_data 0 0 0 0 0 0 1 1 
ll_current_state.ll_wait_1 0 0 0 0 0 1 0 1 
ll_current_state.ll_wait_1e 0 0 0 0 1 0 0 1 
ll_current_state.ll_clk_re 0 0 0 1 0 0 0 1 
ll_current_state.ll_wait_2 0 0 1 0 0 0 0 1 
ll_current_state.ll_wait_2e 0 1 0 0 0 0 0 1 
ll_current_state.ll_clk_fe 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|ADC:adc_v_h|hl_current_state
Name hl_current_state.hl_read_adc_d hl_current_state.hl_read_adc hl_current_state.hl_set_config_reg_2 hl_current_state.hl_set_config_reg_1 hl_current_state.ADC_reset_boot hl_current_state.ADC_reset hl_current_state.hl_reset 
hl_current_state.hl_reset 0 0 0 0 0 0 0 
hl_current_state.ADC_reset 0 0 0 0 0 1 1 
hl_current_state.ADC_reset_boot 0 0 0 0 1 0 1 
hl_current_state.hl_set_config_reg_1 0 0 0 1 0 0 1 
hl_current_state.hl_set_config_reg_2 0 0 1 0 0 0 1 
hl_current_state.hl_read_adc 0 1 0 0 0 0 1 
hl_current_state.hl_read_adc_d 1 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|DAC:dac_l|current_state
Name current_state.clk_fe_state current_state.wait_state_2_e current_state.wait_state_2 current_state.clk_re_state current_state.wait_state_1_e current_state.wait_state_1 current_state.apply_data current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 
current_state.apply_data 0 0 0 0 0 0 1 1 
current_state.wait_state_1 0 0 0 0 0 1 0 1 
current_state.wait_state_1_e 0 0 0 0 1 0 0 1 
current_state.clk_re_state 0 0 0 1 0 0 0 1 
current_state.wait_state_2 0 0 1 0 0 0 0 1 
current_state.wait_state_2_e 0 1 0 0 0 0 0 1 
current_state.clk_fe_state 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_2|DAC:dac_h|current_state
Name current_state.clk_fe_state current_state.wait_state_2_e current_state.wait_state_2 current_state.clk_re_state current_state.wait_state_1_e current_state.wait_state_1 current_state.apply_data current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 
current_state.apply_data 0 0 0 0 0 0 1 1 
current_state.wait_state_1 0 0 0 0 0 1 0 1 
current_state.wait_state_1_e 0 0 0 0 1 0 0 1 
current_state.clk_re_state 0 0 0 1 0 0 0 1 
current_state.wait_state_2 0 0 1 0 0 0 0 1 
current_state.wait_state_2_e 0 1 0 0 0 0 0 1 
current_state.clk_fe_state 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|current_state
Name current_state.set_DAC_state current_state.post_adjust_state current_state.calc_state_2 current_state.calc_state_1 current_state.div_state current_state.mult_state current_state.accu_state current_state.diff_state current_state.collect_data_state current_state.ready_state current_state.pre_ready_state current_state.reset_wait_state current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 0 0 0 0 0 
current_state.reset_wait_state 0 0 0 0 0 0 0 0 0 0 0 1 1 
current_state.pre_ready_state 0 0 0 0 0 0 0 0 0 0 1 0 1 
current_state.ready_state 0 0 0 0 0 0 0 0 0 1 0 0 1 
current_state.collect_data_state 0 0 0 0 0 0 0 0 1 0 0 0 1 
current_state.diff_state 0 0 0 0 0 0 0 1 0 0 0 0 1 
current_state.accu_state 0 0 0 0 0 0 1 0 0 0 0 0 1 
current_state.mult_state 0 0 0 0 0 1 0 0 0 0 0 0 1 
current_state.div_state 0 0 0 0 1 0 0 0 0 0 0 0 1 
current_state.calc_state_1 0 0 0 1 0 0 0 0 0 0 0 0 1 
current_state.calc_state_2 0 0 1 0 0 0 0 0 0 0 0 0 1 
current_state.post_adjust_state 0 1 0 0 0 0 0 0 0 0 0 0 1 
current_state.set_DAC_state 1 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|ADC:adc_c_h|ll_current_state
Name ll_current_state.ll_clk_fe ll_current_state.ll_wait_2e ll_current_state.ll_wait_2 ll_current_state.ll_clk_re ll_current_state.ll_wait_1e ll_current_state.ll_wait_1 ll_current_state.ll_apply_data ll_current_state.ll_reset 
ll_current_state.ll_reset 0 0 0 0 0 0 0 0 
ll_current_state.ll_apply_data 0 0 0 0 0 0 1 1 
ll_current_state.ll_wait_1 0 0 0 0 0 1 0 1 
ll_current_state.ll_wait_1e 0 0 0 0 1 0 0 1 
ll_current_state.ll_clk_re 0 0 0 1 0 0 0 1 
ll_current_state.ll_wait_2 0 0 1 0 0 0 0 1 
ll_current_state.ll_wait_2e 0 1 0 0 0 0 0 1 
ll_current_state.ll_clk_fe 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|ADC:adc_c_h|hl_current_state
Name hl_current_state.hl_read_adc_d hl_current_state.hl_read_adc hl_current_state.hl_set_config_reg_2 hl_current_state.hl_set_config_reg_1 hl_current_state.ADC_reset_boot hl_current_state.ADC_reset hl_current_state.hl_reset 
hl_current_state.hl_reset 0 0 0 0 0 0 0 
hl_current_state.ADC_reset 0 0 0 0 0 1 1 
hl_current_state.ADC_reset_boot 0 0 0 0 1 0 1 
hl_current_state.hl_set_config_reg_1 0 0 0 1 0 0 1 
hl_current_state.hl_set_config_reg_2 0 0 1 0 0 0 1 
hl_current_state.hl_read_adc 0 1 0 0 0 0 1 
hl_current_state.hl_read_adc_d 1 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|ADC:adc_v_h|ll_current_state
Name ll_current_state.ll_clk_fe ll_current_state.ll_wait_2e ll_current_state.ll_wait_2 ll_current_state.ll_clk_re ll_current_state.ll_wait_1e ll_current_state.ll_wait_1 ll_current_state.ll_apply_data ll_current_state.ll_reset 
ll_current_state.ll_reset 0 0 0 0 0 0 0 0 
ll_current_state.ll_apply_data 0 0 0 0 0 0 1 1 
ll_current_state.ll_wait_1 0 0 0 0 0 1 0 1 
ll_current_state.ll_wait_1e 0 0 0 0 1 0 0 1 
ll_current_state.ll_clk_re 0 0 0 1 0 0 0 1 
ll_current_state.ll_wait_2 0 0 1 0 0 0 0 1 
ll_current_state.ll_wait_2e 0 1 0 0 0 0 0 1 
ll_current_state.ll_clk_fe 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|ADC:adc_v_h|hl_current_state
Name hl_current_state.hl_read_adc_d hl_current_state.hl_read_adc hl_current_state.hl_set_config_reg_2 hl_current_state.hl_set_config_reg_1 hl_current_state.ADC_reset_boot hl_current_state.ADC_reset hl_current_state.hl_reset 
hl_current_state.hl_reset 0 0 0 0 0 0 0 
hl_current_state.ADC_reset 0 0 0 0 0 1 1 
hl_current_state.ADC_reset_boot 0 0 0 0 1 0 1 
hl_current_state.hl_set_config_reg_1 0 0 0 1 0 0 1 
hl_current_state.hl_set_config_reg_2 0 0 1 0 0 0 1 
hl_current_state.hl_read_adc 0 1 0 0 0 0 1 
hl_current_state.hl_read_adc_d 1 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|DAC:dac_l|current_state
Name current_state.clk_fe_state current_state.wait_state_2_e current_state.wait_state_2 current_state.clk_re_state current_state.wait_state_1_e current_state.wait_state_1 current_state.apply_data current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 
current_state.apply_data 0 0 0 0 0 0 1 1 
current_state.wait_state_1 0 0 0 0 0 1 0 1 
current_state.wait_state_1_e 0 0 0 0 1 0 0 1 
current_state.clk_re_state 0 0 0 1 0 0 0 1 
current_state.wait_state_2 0 0 1 0 0 0 0 1 
current_state.wait_state_2_e 0 1 0 0 0 0 0 1 
current_state.clk_fe_state 1 0 0 0 0 0 0 1 

State Machine - |C2616|controller:controller_1|DAC:dac_h|current_state
Name current_state.clk_fe_state current_state.wait_state_2_e current_state.wait_state_2 current_state.clk_re_state current_state.wait_state_1_e current_state.wait_state_1 current_state.apply_data current_state.reset_state 
current_state.reset_state 0 0 0 0 0 0 0 0 
current_state.apply_data 0 0 0 0 0 0 1 1 
current_state.wait_state_1 0 0 0 0 0 1 0 1 
current_state.wait_state_1_e 0 0 0 0 1 0 0 1 
current_state.clk_re_state 0 0 0 1 0 0 0 1 
current_state.wait_state_2 0 0 1 0 0 0 0 1 
current_state.wait_state_2_e 0 1 0 0 0 0 0 1 
current_state.clk_fe_state 1 0 0 0 0 0 0 1 

State Machine - |C2616|main_logic:main_logic_1|UART_state
Name UART_state.tx_bulk_done UART_state.tx_bulk_send_byte_2_wait_eee UART_state.tx_bulk_send_byte_2_wait_ee UART_state.tx_bulk_send_byte_2_wait_e UART_state.tx_bulk_send_byte_2_wait UART_state.tx_bulk_send_byte_2 UART_state.tx_bulk_send_byte_1_wait_eee UART_state.tx_bulk_send_byte_1_wait_ee UART_state.tx_bulk_send_byte_1_wait_e UART_state.tx_bulk_send_byte_1_wait UART_state.tx_bulk_send_byte_1 UART_state.tx_bulk_fetch_wait_2 UART_state.tx_bulk_fetch_wait UART_state.tx_bulk_fetch UART_state.tx_data_wait_state_2eee UART_state.tx_data_wait_state_2ee UART_state.tx_data_wait_state_2e UART_state.tx_data_wait_state_2 UART_state.tx_data_state_2 UART_state.tx_data_wait_state_1eee UART_state.tx_data_wait_state_1ee UART_state.tx_data_wait_state_1e UART_state.tx_data_wait_state_1 UART_state.tx_data_state_1 UART_state.rx_data_state_5 UART_state.rx_data_state_4 UART_state.rx_data_state_3 UART_state.rx_data_state_2 UART_state.rx_data_state_1 UART_state.register_state UART_state.reset_state 
UART_state.reset_state 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 
UART_state.register_state 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 
UART_state.rx_data_state_1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 
UART_state.rx_data_state_2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 
UART_state.rx_data_state_3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 
UART_state.rx_data_state_4 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 
UART_state.rx_data_state_5 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 1 
UART_state.tx_data_state_1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_1e 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_1ee 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_1eee 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_state_2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_2e 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_2ee 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_data_wait_state_2eee 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_fetch 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_fetch_wait 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_fetch_wait_2 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_1_wait 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_1_wait_e 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_1_wait_ee 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_1_wait_eee 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_2 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_2_wait 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_2_wait_e 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_2_wait_ee 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_send_byte_2_wait_eee 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 
UART_state.tx_bulk_done 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 

State Machine - |C2616|UART_TX:uart_tx_1|r_SM_Main
Name r_SM_Main.s_Cleanup r_SM_Main.s_TX_Stop_Bit r_SM_Main.s_TX_Data_Bits r_SM_Main.s_TX_Start_Bit r_SM_Main.s_Idle 
r_SM_Main.s_Idle 0 0 0 0 0 
r_SM_Main.s_TX_Start_Bit 0 0 0 1 1 
r_SM_Main.s_TX_Data_Bits 0 0 1 0 1 
r_SM_Main.s_TX_Stop_Bit 0 1 0 0 1 
r_SM_Main.s_Cleanup 1 0 0 0 1 

State Machine - |C2616|UART_RX:uart_rx_1|r_SM_Main
Name r_SM_Main.s_Cleanup r_SM_Main.s_RX_Stop_Bit r_SM_Main.s_RX_Data_Bits r_SM_Main.s_RX_Start_Bit r_SM_Main.s_Idle 
r_SM_Main.s_Idle 0 0 0 0 0 
r_SM_Main.s_RX_Start_Bit 0 0 0 1 1 
r_SM_Main.s_RX_Data_Bits 0 0 1 0 1 
r_SM_Main.s_RX_Stop_Bit 0 1 0 0 1 
r_SM_Main.s_Cleanup 1 0 0 0 1 
