;
;Programmname	:SUPPORT
;---------------------------------------------------------------
;Datum			:29.03.2013
;---------------------------------------------------------------

;-----------------------------------------------------------------
;CPU			:ATmega 644
;-----------------------------------------------------------------

.cseg

;INT0H:		;IRQ0 Handler
INT1H:		;IRQ1 Handler
INT2H:		;IRQ2 Handler
PCINT0H:	;PCINT0 Handler
PCINT1H:	;PCINT1 Handler
;PCINT2H:	;PCINT2 Handler
PCINT3H:	;PCINT3 Handler
WDT: 		;Watchdog Timeout Handler
TIM2_COMPA: ;Timer2 CompareA Handler
TIM2_COMPB: ;Timer2 CompareB Handler
TIM2_OVF: 	;Timer2 Overflow Handler
TIM1_CAPT: 	;Timer1 Capture Handler
TIM1_COMPA: ;Timer1 CompareA Handler
TIM1_COMPB: ;Timer1 CompareB Handler
TIM1_OVF: 	;Timer1 Overflow Handler
TIM0_COMPA: ;Timer0 CompareA Handler
TIM0_COMPB: ;Timer0 CompareB Handler
TIM0_OVF: 	;Timer0 Overflow Handler
SPI_STC: 	;SPI Transfer Complete Handler
USART0_RXC: ;USART0 RX Complete Handler
USART0_UDRE: ;USART0,UDR Empty Handler
USART0_TXC: ;USART0 TX Complete Handler
ANA_COMP: 	;Analog Comparator Handler
ADC_INT:	;ADC Conversion Complete
EE_RDY: 	;EEPROM Ready Handler
TWI: 		;2-wire Serial Handler
SPM_RDY: 	;SPM Ready Handler
reti
;-----------------------------------------------------------------
;-----------------------------------------------------------------
delay_1s:
;Xtal = 20 MHz
; generate  delay
push	r16
push	r17
push	r18

ldi		r16,252
ldi		r17,255
ldi		r18,103
dly_loop:
dec		r16
brne	dly_loop
ldi		r16,252
dec		r17
brne	dly_loop
dec		r18
brne	dly_loop

pop		r18
pop		r17
pop		r16
ret
;--------------------------------------------------------------
;--------------------------------------------------------------



